Manufactured semiconductor devices include multiple integrated circuits (ICs), and/or other devices or elements which are formed on a semiconductor wafer before being separated or singulated into individual chips or dies. Generally integrated circuits are located within active areas or regions of the semiconductor wafer. The wafers can include spacing areas or kerf regions that can provide adequate separation between neighboring active or device regions. The semiconductor wafers are typically separated or diced in these spacing areas or kerf regions to form individual semiconductor chips or dies.
Various methods are used for separating a semiconductor wafer or semiconductor workpiece, including, e.g., mechanical sawing, etching, laser dicing, stealth laser dicing, or the like. Some methods may require a relatively large dicing street on a semiconductor wafer and therefore reduce the amount of semiconductor wafer material used for active or device regions. Some separation or singulation methods can also cause damage to a semiconductor wafer, such as, among other things, in the form of sidewall chipping. Thin semiconductor wafers, as well as semiconductor wafers having a backside metallization layer can be particularly susceptible to sidewall chipping.
Further, some separation methods can also damage a semiconductor wafer by causing ridges to form in a semiconductor wafer. These ridges, in turn, can lead to breakage during die pick up. Yet still, some separation methods can cause unwanted changes to a semiconductor wafer, such as, in one example, causing mono crystalline silicon to transform into an amorphous state in an uncontrolled way. In general, many separation or dicing techniques can produce chipped edges in subsequently formed semiconductor chips. The chipped edges reduce the breaking strength of the semiconductor chips.
Thus wafer separation techniques that reduce or minimize the needed spacing regions while also avoiding or reducing damage to the wafers may be desirable.
In a dicing before grinding (DBG) singulation process, wafers may be processed in a preliminary step so that material is removed from kerf regions (sawed, etched, etc.) from a front side, for example, at least up to the depth of a required chip thickness. Subsequently, such wafers may be diced from the back side by means of a grinding process. In DBG methods heretofore, metallizing the back side has not been possible because wafers and/or chips to which a foil or the like has been applied are not mechanically stable enough after grinding in order to be able to be handled. Conventional carrier-technique methods including the use of a rigid carrier and liquid glue are not suitable because the glue cannot be subsequently removed from chipped sidewalls.
Thus DBG like separation techniques that enable, e.g., metallization of a wafer and/or chip back side may be desirable.